The present invention relates to a method for determining by optimization a multi-core architecture and a way of implementing an application on the architecture for a given application. The present invention also relates to the associated computer program product.
A multi-core architecture is a computing platform comprising several processing units or processing cores. Each processing unit is in particular able to execute computer programs and process data. Such processing is done in parallel, i.e., autonomously with respect to the other units. Depending on the case, a multi-core architecture also includes one or more of the following elements: a processor, a memory, a connection for input and output peripherals or a communication network, for example a network on-chip (NoC). Central processing units (CPU) and graphics processing units (GPU) are examples of multi-core architectures.
In order to design a multi-core architecture suitable for a given application, a traditional approach consists of establishing a profile of the considered application, then implementing the application on all of the candidate architectures, and lastly, jointly optimizing the architectures and the application.
However, such an approach involves many user operations, which is time-consuming and a source of errors.
Many tools aiming to explore multi-core architectures that may be suitable for a given application automatically have been developed.
Thus, it is known to use high-level synthesis (HLS) tools able to interpret an algorithmic description of a desired behavior and to create the architecture implementing that behavior.
However, for performance levels in terms of execution time of the application by the architecture, surface occupied by the architecture and energy consumed by the architecture, an architecture obtained automatically by such HLS tools does not achieve the performance that would be obtained manually.
There is therefore a need for a method for determining by optimization a multi-core architecture for a given application that is quick to implement while providing a multi-core architecture having performance levels in terms of execution time, surface and consumed energy, closer to the performances of a manual optimization technique.